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dc.contributor.authorMoreshet, Talien_US
dc.contributor.authorPapagiannopoulou, Dimitraen_US
dc.contributor.authorMarongiu, Andreaen_US
dc.contributor.authorHerlihy, Mauriceen_US
dc.contributor.authorBahar, R. Irisen_US
dc.date.accessioned2018-02-12T16:07:30Z
dc.date.available2018-02-12T16:07:30Z
dc.date.issued2017-10-01
dc.identifier.citationT Moreshet, D Papagiannopoulou, A Marongiu, L Benini, M Herlihy, R Bahar. 2017. "Edge-TM: Exploiting Transactional Memory for Error Tolerance and Energy Efficiency." International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
dc.identifier.urihttps://hdl.handle.net/2144/26957
dc.description.abstractScaling of semiconductor devices has enabled higher levels of integration and performance improvements at the price of making devices more susceptible to the effects of static and dynamic variability. Adding safety margins (guardbands) on the operating frequency or supply voltage prevents timing errors, but has a negative impact on performance and energy consumption. We propose Edge-TM, an adaptive hardware/software error management policy that (i) optimistically scales the voltage beyond the edge of safe operation for better energy savings and (ii) works in combination with a Hardware Transactional Memory (HTM)-based error recovery mechanism. The policy applies dynamic voltage scaling (DVS) (while keeping frequency fixed) based on the feedback provided by HTM, which makes it simple and generally applicable. Experiments on an embedded platform show our technique capable of 57% energy improvement compared to using voltage guardbands and an extra 21-24% improvement over existing state-of-the-art error tolerance solutions, at a nominal area and time overhead.en_US
dc.rightsPermission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the owner/author(s).en_US
dc.titleEdge-TM: Exploiting transactional memory for error tolerance and energy efficiencyen_US
dc.typeConference materialsen_US
dc.identifier.doi10.1145/3126556
pubs.elements-sourcemanual-entryen_US
pubs.notesEmbargo: Not knownen_US
pubs.organisational-groupBoston Universityen_US
pubs.organisational-groupBoston University, College of Engineeringen_US
pubs.organisational-groupBoston University, College of Engineering, Department of Electrical & Computer Engineeringen_US
pubs.publication-statusPublisheden_US


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