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dc.contributor.authorYe, Yingen_US
dc.contributor.authorWest, Richarden_US
dc.contributor.authorZhang, Jingyien_US
dc.contributor.authorCheng, Zhuoqunen_US
dc.coverage.spatialPorto, PORTUGALen_US
dc.date.accessioned2018-04-02T17:36:28Z
dc.date.available2018-04-02T17:36:28Z
dc.date.issued2016-01-01
dc.identifierhttp://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000399156600017&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=6e74115fe3da270499c3d65c9b17d654
dc.identifier.citationYing Ye, Richard West, Jingyi Zhang, Zhuoqun Cheng. 2016. "MARACAS: A Real-Time Multicore VCPU Scheduling Framework." PROCEEDINGS OF 2016 IEEE REAL-TIME SYSTEMS SYMPOSIUM (RTSS). 37th IEEE Real-Time Systems Symposium (RTSS). Porto, PORTUGAL, 2016-11-29 - 2016-12-02
dc.identifier.urihttps://hdl.handle.net/2144/27916
dc.description.abstractThis paper describes a multicore scheduling and load-balancing framework called MARACAS, to address shared cache and memory bus contention. It builds upon prior work centered around the concept of virtual CPU (VCPU) scheduling. Threads are associated with VCPUs that have periodically replenished time budgets. VCPUs are guaranteed to receive their periodic budgets even if they are migrated between cores. A load balancing algorithm ensures VCPUs are mapped to cores to fairly distribute surplus CPU cycles, after ensuring VCPU timing guarantees. MARACAS uses surplus cycles to throttle the execution of threads running on specific cores when memory contention exceeds a certain threshold. This enables threads on other cores to make better progress without interference from co-runners. Our scheduling framework features a novel memory-aware scheduling approach that uses performance counters to derive an average memory request latency. We show that latency-based memory throttling is more effective than rate-based memory access control in reducing bus contention. MARACAS also supports cache-aware scheduling and migration using page recoloring to improve performance isolation amongst VCPUs. Experiments show how MARACAS reduces multicore resource contention, leading to improved task progress.en_US
dc.description.urihttp://www.cs.bu.edu/fac/richwest/papers/rtss_2016.pdf
dc.format.extentp. 179 - 190en_US
dc.languageEnglish
dc.publisherIEEEen_US
dc.relation.ispartofPROCEEDINGS OF 2016 IEEE REAL-TIME SYSTEMS SYMPOSIUM (RTSS)
dc.subjectScience & technologyen_US
dc.subjectComputer science, cyberneticsen_US
dc.subjectComputer science, hardware & architectureen_US
dc.subjectComputer science, theory & methodsen_US
dc.subjectComputer scienceen_US
dc.subjectSporadic task systemsen_US
dc.titleMARACAS: a real-time multicore VCPU scheduling frameworken_US
dc.typeConference materialsen_US
dc.description.versionAccepted manuscripten_US
dc.identifier.doi10.1109/RTSS.2016.026
pubs.elements-sourceweb-of-scienceen_US
pubs.notesEmbargo: Not knownen_US
pubs.organisational-groupBoston Universityen_US
pubs.organisational-groupBoston University, College of Arts & Sciencesen_US
pubs.organisational-groupBoston University, College of Arts & Sciences, Department of Computer Scienceen_US
pubs.publication-statusPublisheden_US


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