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dc.contributor.authorPatel, R.en_US
dc.contributor.authorWolfe, P.-F.en_US
dc.contributor.authorMunafo, R.en_US
dc.contributor.authorVaria, Mayanken_US
dc.contributor.authorHerbordt, M.en_US
dc.date.accessioned2021-10-27T18:03:09Z
dc.date.available2021-10-27T18:03:09Z
dc.date.issued2020-09-22
dc.identifier.citationR. Patel, P.-.F. Wolfe, R. Munafo, M. Varia, M. Herbordt. 2020. "Arithmetic and Boolean Secret Sharing MPC on FPGAs in the Data Center." 2020 IEEE High Performance Extreme Computing Conference (HPEC). 2020 IEEE High Performance Extreme Computing Conference (HPEC). 2020-09-22 - 2020-09-24. https://doi.org/10.1109/hpec43674.2020.9286159
dc.identifier.urihttps://hdl.handle.net/2144/43226
dc.description.abstractMulti-Party Computation (MPC) is an important technique used to enable computation over confidential data from several sources. The public cloud provides a unique opportunity to enable MPC in a low latency environment. Field Programmable Gate Array (FPGA) hardware adoption allows for both MPC acceleration and utilization of low latency, high bandwidth communication networks that substantially improve the performance of MPC applications. In this work, we show how designing arithmetic and Boolean Multi-Party Computation gates for FPGAs in a cloud provide improvements to current MPC offerings and ease their use in applications such as machine learning. We focus on the usage of Secret Sharing MPC first designed by Araki et al [1] to design our FPGA MPC while also providing a comparison with those utilizing Garbled Circuits for MPC. We show that Secret Sharing MPC provides a better usage of cloud resources, specifically FPGA acceleration, than Garbled Circuits and is able to use at least a 10 × less computer resources as compared to the original design using CPUs.en_US
dc.language.isoen_US
dc.publisherIEEEen_US
dc.relation.ispartof2020 IEEE High Performance Extreme Computing Conference (HPEC)
dc.titleArithmetic and Boolean secret sharing MPC on FPGAs in the data centeren_US
dc.typeConference materialsen_US
dc.description.versionAccepted manuscripten_US
dc.identifier.doi10.1109/hpec43674.2020.9286159
pubs.elements-sourcecrossrefen_US
pubs.organisational-groupBoston Universityen_US
pubs.organisational-groupBoston University, Administrationen_US
pubs.organisational-groupBoston University, College of Engineeringen_US
pubs.organisational-groupBoston University, College of Engineering, Department of Electrical & Computer Engineeringen_US
pubs.organisational-groupBoston University, Faculty of Computing & Data Sciencesen_US
pubs.publication-statusPublisheden_US
dc.identifier.mycv589225


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