Reconciling predictability and coherent caching

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MECO_2020_Cache_Coherence.pdf(539.96 KB)
Accepted manuscript
Date
2020-06
Authors
Bansal, Ayoosh
Singh, Jayati
Hao, Yifan
Wen, Jen-Yang
Mancuso, Renato
Caccamo, Marco
Version
OA Version
Accepted manuscript
Citation
Ayoosh Bansal, Jayati Singh, Yifan Hao, Jen-Yang Wen, Renato Mancuso, Marco Caccamo. 2020. "Reconciling Predictability and Coherent Caching." 2020 9th Mediterranean Conference on Embedded Computing (MECO). 2020 9th Mediterranean Conference on Embedded Computing (MECO). 2020-06-08 - 2020-06-11. https://doi.org/10.1109/meco49872.2020.9134262
Abstract
Real-time systems are required to respond to their physical environment within predictable time. While multi-core platforms provide incredible computational power and throughput, they also introduce new sources of unpredictability. For parallel applications with data shared across multiple cores, overhead to maintain data coherence is a major cause of execution time variability. This source of variability can be eliminated by application level control for limiting data caching at different levels of the cache hierarchy. This removes the requirement of explicit coherence machinery for selected data. We show that such control can reduce the worst case write request latency on shared data by 52%. Benchmark evaluations show that proposed technique has a minimal impact on average performance.
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