A universal maximum likelihood decoder using noise guessing
Embargo Date
2022-05-08
OA Version
Citation
Abstract
Wireless communication technologies lie at the forefront of cutting edge and form the backbone of the Internet and Data first era that we live in. The need for High-speed data communication also exacerbates the need of data reliability. Data is encoded before transmission to ensure that it is faithfully reproduced at the receiver. Decoding an arbitrary code has been described as a NP-complete problem. As a result of this, previous works have developed decoders that are specific to certain codes, as an approximation of Maximum Likelihood Decoding. This co-development of codes and decoding schemes, however, limits the functionality of the decoders, which can only work with a finite number of encoding schemes that were designed for it. It has also been seen that the performance of these decoders degrade as we increase the code-rate.
In our proposed approach we leverage a new algorithm, Guessing Random Additive Noise Decoding (GRAND) algorithm, for realizing Maximum Likelihood (ML) decoding based on noise, contrasting traditional algorithms which decode the information directly. Since GRAND decodes the noise rather than the information, it reduces computational complexity and storage. In contrast to traditional architectures, GRAND decoder can be designed independently of the encoder due to its dependency only on the noise making it a universal maximum-likelihood decoder. Hence this architecture is agnostic to any coding scheme. GRAND algorithm is also proven to be capacity achieving when using random code-books. The decoder works for high-rate, small block-size code-words, at low latency and low complexity, making it ideal for implementing in the control channel.
Our approach holistically develops and integrates GRAND and embedded security to demonstrate a secure hardware solution that has high-energy efficiency with low latency and low complexity performance metrics addressing next-generation communication system requirements. We present preliminary estimates of throughput around 250 Mbps, at a Bit Error Rate of 0.001, with an energy per bit value of 16.5 pJ/b at a clock frequency of 50 MHz for a supply voltage of 0.9 V.
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Attribution 4.0 International